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8 Mbit (x16) Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF801C / SST39VF802C / SST39LF801C / SST39LF802C
Data Sheet
TOP VIEW (balls facing down)
6
5
4
3
A2
A1
A0
A4
A3
A5
A6
A7
A18
A17
WP#
NC
NC
WE# RST# A9
RY/BY# A10
A8
A11
A13
A12
A14
A15
2
CE# DQ8 DQ10
DQ4 DQ11 A16
1
VSS OE# DQ9
NC
NC
DQ5 DQ6 DQ7
DQ0 DQ1 DQ2 DQ3 VDD DQ12 DQ13 DQ14 DQ15 VSS
A B C D E F G H J K L
1434 48-wfbga MAQ P3.0
Figure 4: Pin Assignments for 48-Ball WFBGA
Table 1: Pin Description
Symbol
A MS1 -A 0
Pin Name
Address Inputs
Functions
To provide memory addresses.
During Sector-Erase A MS -A 11 address lines will select the sector.
During Block-Erase A MS -A 15 address lines will select the block.
DQ 15 -DQ 0
Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
WP#
RST#
CE#
OE#
WE#
V DD
V SS
NC
RY/BY#
Write Protect
Reset
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
Ready/Busy#
To protect the top/bottom boot block from Erase/Program operation when
grounded.
To reset and return the device to Read mode.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
Unconnected pins.
To output the status of a Program or Erase operation
RY/BY# is a open drain output, so a 10K ? - 100K ? pull-up resistor is required
to allow RY/BY# to transition high indicating the device is ready to read.
T1.2 25041
1. A MS = Most significant address
A MS = A 18
?2011 Silicon Storage Technology, Inc.
5
DS25041A
05/11
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